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Model 56664 4-Channel 200 MHz A/D with DDC, VITA 49.0, Virtex-6 FPGA - AMC

This product is in the Inactive Life Cycle. Please contact Pentek for additional information.

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  • Complete radar and software radio interface solution
  • PCIe output supports VITA 49.0 VITA Radio Transport (VRT) Standard
  • Supports Xilinx Virtex-6 LXT and SXT FPGAs
  • Four 200 MHz 16-bit A/Ds
  • Four multiband DDCs
  • Multiboard programmable beamformer
  • Up to 2 GB of DDR3 SDRAM or 32 MB of QDRII+ SRAM
  • Sample clock synchronization to an external system reference
  • LVPECL clock sync bus for multimodule synchronization
  • PCI Express (Gen. 1 & 2) interface up to x8 wide
  • AMC.1 compliant
  • IPMI 2.0 compliant Module Management Controller (MMC)
  • Optional front panel LVDS connections to the Virtex-6 FPGA for custom I/O

 

Model 56664

Cobalt Xilinx Virtex-6
 

Model 56664 Block Diagram

Please refer to the product datasheet for a larger version of the block diagram


Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

Part No.
Type
Description
Revision/Date
816.71660 User's Guide Model 4994A Option 166/66x/662/176/76x Linux ReadyFlow BSP for 7166x, 7176x 4.3 (5/9/2016)



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