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Model 7152 Quad 200 MHz, 16-bit A/D, 32-Channel DDC - PMC

Block Diagram Datasheet Manuals Software Literature Life Cycle Management Ordering & Warranty Catalogs

32 channels of DDC in four banks of 8 channels Four 200 MHz, 16-bit A/Ds Independent 32-bit DDC tuning for all 32 channels DDC decimation from 16 to 8192 in steps of 8 Bandwidths from 20 kHz to 10 MHz Common decimation factor within each DDC bank Different decimation factors between banks User-programmable 18-bit FIR filter coefficients Default filters offer 0.2 dB ripple and 100 dB rejection Power meters and threshold detectors LVPECL clock/sync bus for multimodule synchronization

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