3
Pentek Homepage
Follow Us On LinkedIn Follow Us On Twitter Follow Us On YouTube Follow Us On Facebook Register AccountRegister Login AccountSign In
Board Selector   |  Recorder Selector   |  
Search:  
Home > Products > Model 54821

Your Pentek With YourPentek, you can be notified when new documentation and other updated product information is available for the Model 54821. Please login or register to manage your profile.

Model 54821 3-Ch 200 MHz A/D with DDC & 2-Ch 800 MHz D/A with DUC, Kintex UltraScale - 3UVPX

Request a Quote

Block Diagram

Datasheet

Manuals

Software

Development Systems

Literature

Life Cycle Management

Ordering & Warranty

Catalogs

Free Lifetime Support

 
  • Exceptional dynamic range/analog signal integrity
  • Xilinx® Kintex® UltraScale" FPGA
  • Compatible with several VITA standards including: VITA 66.5, VITA 67.2 and VITA 67.3C
  • Three 200 MHz 16-bit A/Ds
  • Three multiband DDCs (digital downconverters)
  • One DUC (digital upconverter)
  • Two 800 MHz 16-bit D/As
  • 5 GB of 2400 DDR4 SDRAM
  • Programmable frequency synthesizedsample clock generator
  • Sample clock synchronization to an external system reference
  • Powerful DMA controllers for moving data
  • PCI Express (Gen. 1, 2 & 3) interface up to x8
  • Multi-channel synchronization with clock/sync bus
  • Optional clock/sync generator for multi-board systems
  • Optional gigabit serial links for custom FPGA I/O
  • Optional LVDS port and gigabit serial links for custom FPGA I/O
  • Ruggedized and conduction-cooled versions available

 

Request a Quote

Model 54821

Jade Xilinx Kintex UltraScale FPGA Family Brochure
Jade Xilinx UltraScale
 

Model 54821 Block Diagram

Please refer to the product datasheet for a larger version of the block diagram



Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

A complete set of user manuals is provided in HTML format. Access to detailed documentation of the IP Core modules and their programmable registers is only available in the HTML version of the operating manual. Instructions for getting the HTML version of the user manuals is provided in the User Manual Library document listed below.

Part No.
Type
Description
Revision/Date
800.48145 User's Guide Navigator BSP for Jade User's Guide - Windows & Linux 4.2 (9/29/2023)
822.71821 Release Note Model 71821 FDK Revision Histories 3.0 (11/8/2023)

Software Products - ( top )

Model
Option
Description
4811 821 Navigator FDK (FPGA Design Kit)
4814 821 Navigator BSP (Board Support Package) for Linux
4815 821 Navigator BSP (Board Support Package) for Windows



CONNECT ON SOCIAL:  Follow Us On Facebook Follow Us On LinkedIn Follow Us On Twitter Follow Us On YouTube

Pentek, Inc. • One Park Way, Upper Saddle River, NJ, 07458, USA
Tel: +1 (201) 818-5900 • Fax: +1 (201) 818-5904 • Map + Directions • Site Map
Terms of Use • Privacy Policy • Copyright © 2024 Pentek, Inc. All Rights Reserved.