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Model 71821 3-Ch 200 MHz A/D with DDC & 2-Ch 800 MHz D/A with DUC, Kintex UltraScale - XMC

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Block Diagram




Development Systems


Life Cycle Management

Ordering & Warranty


Free Lifetime Support

  • Exceptional dynamic range and analog signal integrity
  • Xilinx® Kintex® UltraScale" FPGA
  • Three 200 MHz 16-bit A/Ds
  • Three multiband DDCs (digital downconverters)
  • One DUC (digital upconverter)
  • Two 800 MHz 16-bit D/As
  • 5 GB of 2400 MHz DDR4 SDRAM
  • Programmable frequency synthesized sample clock generator
  • Sample clock synchronization to an external system reference
  • Powerful DMA controllers for moving data
  • PCI Express (Gen. 1, 2 & 3) interface up to x8
  • Multi-channel synchronization with clock/sync bus
  • Optional clock/sync generator for multi-board systems
  • Optional LVDS port for custom FPGA I/O
  • Optional gigabit serial links for custom FPGA I/O
  • Ruggedized and conduction-cooled versions available
  • Navigator® BSP for software development
  • Navigator® FDK for custom IP development
  • SPARK® fully-integrated development system
  • Free lifetime applications support


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Model 71821

Jade Xilinx Kintex UltraScale FPGA Family Brochure
Jade Xilinx UltraScale

Model 71821 Block Diagram

Please refer to the product datasheet for a larger version of the block diagram

Pricing and Availability

For the latest pricing, delivery and available options, please fill out this form and your request will be delivered to the appropriate department. To learn more about our products or to discuss your specific application please contact our sales department at SDL-sales@mrcy.com, 201-818-5900 or contact your local representative.

Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

A complete set of user manuals is provided in HTML format. Access to detailed documentation of the IP Core modules and their programmable registers is only available in the HTML version of the operating manual. Instructions for getting the HTML version of the user manuals is provided in the User Manual Library document listed below.

Part No.
800.48145 User's Guide Navigator BSP for Jade User's Guide - Windows & Linux 4.2 (9/29/2023)
800.71821 Operating Manual 3-Ch 200 MHz A/D, 2-Ch 800 MHz D/A with DDCs, DUC Jade Family XMC Module 1.3 (3/28/2018)
820.71821 User's Guide Getting Started Guide for Model 71821 1.1 (3/1/2018)
821.71821 Release Note User Manual Library for Model 71821 2.0 (3/30/2023)
822.71821 Release Note Model 71821 FDK Revision Histories 3.0 (11/8/2023)

Software Products - ( top )

4811 821 Navigator FDK (FPGA Design Kit)
4814 821 Navigator BSP (Board Support Package) for Linux
4815 821 Navigator BSP (Board Support Package) for Windows

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