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Model 5791 Programmable Multifrequency Clock Synthesizer - 6U VPX

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  • Simultaneous synthesis of up to five different clocks
  • Eight SMC clock outputs
  • Typical phase noise: -105 dBc/Hz @ 1 kHz offset
  • All clocks are phase-locked to input reference signal
  • Input reference frequency of 5 to 100 MHz
  • Four programmable VCXOs with 32-bit tuning resolution
  • Output clocks of 1, 2, 4, 8, or 16 submultiples of VCXO base frequencies
  • Output clock frequencies between 50 and 700 MHz
  • Control and status over the VPX backplane

 

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Model 5791

 

Model 5791 Block Diagram

Please refer to the product datasheet for a larger version of the block diagram



Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

Part No.
Type
Description
Revision/Date
Contact Pentek
For Manual
Model 4994A ReadyFlow Board Support Packages (BSPs) for Linux for Model 5791
Contact Pentek
For Manual
Model 4995A ReadyFlow Board Support Packages (BSPs) for Windows for Model 5791

Software Products - ( top )

Model
Option
Description
4994A 191 ReadyFlow Board Support Packages (BSPs) for Linux
4995A 191 ReadyFlow Board Support Packages (BSPs) for Windows



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