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"Customers driven to get hundreds of channels of analog to digital in a system often ask, 'What's my cost per channel?'" said Rodger Hosking, vice-president of Pentek. "The Model 3316 doubles the channel density for a single slot, key to bringing down the cost per channel."
An internal timing bus provides all timing and synchronization required by the A/D converters. An onboard clock generator can receive an external sample clock from the front panel coaxial connector that can be used directly as the sample clock or divided by a built-in clock synthesizer circuit. Alternately, the sample clock can be sourced from an on-board programmable VCXO (Voltage-Controlled Crystal Oscillator) where the front panel coaxial connector can be used to provide a 10 MHz reference clock to phase-lock the internal oscillator.
"FMCs offer a tremendous amount of design flexibility to embedded platforms," said Hosking, "but bundling with optimized FPGA code on the carrier is critical for fast integration, best performance and advanced features. Pentek IP core functions on the Model 5973 carrier bring out the best capabilities of the Model 3316 FMC."
The Flexor Model 5973 comes preconfigured with a suite of built-in functions for data capture, synchronization, time tagging and formatting, all tailored and optimized for specific FMC modules, including the Flexor Model 3316. These standard Model 5973 functions, plus eight digital down converters (DDCs), enable high performance data capture and transfer modes to provide an ideal turn-key signal interface for radar, communications, or general data acquisition applications, eliminating the integration effort typically left for the user when integrating FMC and carrier.
With a Pentek carrier, developers have an ideal development and deployment platform for applications requiring custom IP. The Pentek GateFlow® FPGA design kit gives users access to the complete factory installed IP at the source level, allowing them to extend or even replace the built in functions.
The Pentek GateXpress® PCIe configuration manager supports dynamic FPGA reconfiguration though software commands as part of the runtime application. This provides an efficient way to quickly reload the FPGA, which normally occurs many times during development. For deployed environments, GateXpress enables reloading the FPGA without the need to reset the host system, ideal for applications that require dynamic access to different IP algorithms or for live updates.
The Pentek ReadyFlow® Board Support Package is available for Windows and Linux operating systems. ReadyFlow consists of a C-callable library, a complete suite of initialization, control and status functions, as well as a rich set of precompiled, ready-to-run-examples to accelerate application development.
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