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Model 72610 LVDS Digital I/O with Virtex-6 FPGA - 6U cPCI

This product is in the Inactive Life Cycle. Please contact Pentek for additional information.

Block Diagram

Datasheet

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Literature

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  • 32 bits of LVDS digital I/O
  • One LVDS clock
  • One LVDS data valid
  • One LVDS data suspend
  • Supports LXT and SXT Virtex-6 FPGAs
  • One DMA controller moves data to and from system memory
  • Up to 2 GB of DDR3 SDRAM
  • Optional LVDS connections to the Virtex-6 FPGA for custom I/O to the carrier board

 

Model 72610

Cobalt Xilinx Virtex-6
 

Model 72610 Block Diagram

Please refer to the product datasheet for a larger version of the block diagram


Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

Part No.
Type
Description
Revision/Date
800.71601 Addendum Model 716xx Battery Installation 1.1 (12/24/2013)
800.71603 Addendum Model 716xx Reprogram FPGA from FLASH 1.0 (12/24/2013)
800.71610 Operating Manual Model 71610 Digital I/O Cobalt Family XMC Module 1.7 (7/2/2015)
801.71610 Programmer's Reference ReadyFlow Board Support Libraries for Model 71610 1.1 (6/22/2016)
809.7x610 Supplemental Manual Vendor Data Sheets for Model 7x610 Series Operating Manuals 1.0 (8/22/2013)
815.71610 User's Guide Model 4995A Option 161 Windows ReadyFlow BSP for Models 71610 1.0A (10/9/2017)
816.71610 User's Guide Model 4994A Option 610 Linux ReadyFlow BSP for Model 71610 1.0 (6/23/2016)



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