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Model 5352 Quad 200 MHz, 16-bit A/D, 32-Channel DDC - 3U VPX

Block Diagram Datasheet Manuals Development Systems Literature Life Cycle Management Ordering & Warranty Catalogs

32 channels of DDC in banks of 8 channels Independent 32-bit DDC tuning for all channels DDC decimation from 16 to 8192 in steps of 8 Bandwidths from 20 kHz to 10 MHz User-programmable 18-bit FIR filter coefficients Default filters offer 0.2 dB ripple and 100 dB rejection Power meters and threshold detectors LVPECL clock/sync bus for multiboard synchronization 3U VPX form factor with ruggedized and conduction-cooled versions available

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