Pentek Announces The New Series 7800 Software Radio Half-Length x8 PCIe Boards
Routing flexibility designed for communications, software radio, telemetry, and signal intelligence applications.
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Model 7841 Dual Multiband Transceiver with FPGA
Features
- Gen. 2 PCIe, x8 wide
- Two 125 MHz, 14-bit A/Ds
- Four-channel DDC (Downconverter)
- One DUC (Upconverter)
- Two 500 MHz, 16-bit D/As
- One Xilinx Virtex-II Pro FPGA
- 512 MB DDR SDRAM
- LVDS clock/sync bus for multiboard synchronization
- Datasheet: click here
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Model 7842 Multichannel Transceiver with FPGAs
Features
- Gen. 2 PCIe, x8 wide
- Four 125 MHz, 14-bit A/Ds
- One DUC (Upconverter)
- One 500 MHz, 16-bit D/A
- Two Xilinx Virtex-4 FPGAs
- 768 MB DDR2 SDRAM
- LVDS clock/sync bus for multiboard synchronization
- Optional installed DDC cores
- Datasheet: click here
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Model 7850 Quad 200 MHz, 16-bit A/D with FPGAs
Features
- Gen. 2 PCIe, x8 wide
- Four 200 MHz, 16-bit A/Ds
- Two Xilinx Virtex-5 FPGAs
- 1.5 GB DDR2 SDRAM
- LVPECL clock/sync bus for multiboard synchronization
- Optional installed DDC cores
- 32 pairs of LVDS connections to the Virtex-5 FPGAs for custom I/O
- Datasheet: click here
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Model 7851 256-Channel DDC, four 200 MHz A/Ds
Features
- Gen. 2 PCIe, x8 wide
- 256 channels of DDCs in four banks
- Independent tuning for each channel
- DDC decimation from 128 to 1024
- User-programmable 18-bit FIR filter coefficients
- Four 200 MHz, 16-bit A/Ds
- LVPECL clock/sync bus for multiboard synchronization
- Datasheet: click here
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Model 7852 32-Channel DDC, four 200 MHz A/Ds
Features
- Gen. 2 PCIe, x8 wide
- 32 channels of DDCs in four banks
- Independent tuning for each channel
- DDC decimation from 16 to 9192
- User-programmable 18-bit FIR filter coefficients
- Power meters and threshold detectors
- LVPECL clock/sync bus for multiboard synchronization
- Datasheet: click here
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Model 7856 Dual 400 MHz A/D and 800 MHz D/A
Features
- Gen. 2 PCIe, x8 wide
- Two 400 MHz, 14-bit A/Ds
- One DUC (Upconverter)
- Two 800 MHz, 16-bit D/As
- Independent A/D and D/A clocks
- Two Xilinx Virtex-5 FPGAs
- 1 GB DDR2 SDRAM
- LVPECL clock/sync bus for multiboard synchronization
- Datasheet: click here
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