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Model 74671 8-Ch 1.25 GHz, 16-bit D/A with DUC, Extended Interpolation, Virtex-6 - 6U cPCI

This product is in the Inactive Life Cycle. Please contact Pentek for additional information.

Block Diagram

Datasheet

Manuals

Literature

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  • Complete radar and software radio interface solution
  • Supports Xilinx Virtex-6 LXT and SXT FPGAs
  • Eight 1.25 GHz 16-bit D/As
  • Eight digital upconverters
  • Extended interpolation range from 2x to 1,048,576x
  • Programmable output levels
  • 250 MHz max. output bandwidth
  • 4 GB of DDR3 SDRAM
  • Sample clock synchronization to an external system reference
  • Quad µSync clock/sync bus for multimodule synchronization
  • Optional LVDS connections to the Virtex-6 FPGA for custom I/O

 

Model 74671

Cobalt Xilinx Virtex-6
 

Model 74671 Block Diagram

Please refer to the product datasheet for a larger version of the block diagram


Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

Part No.
Type
Description
Revision/Date
800.71601 Addendum Model 716xx Battery Installation 1.1 (12/24/2013)
800.71603 Addendum Model 716xx Reprogram FPGA from FLASH 1.0 (1/23/2012)
800.71670 Operating Manual Model 71670 4-Channel D/A Cobalt Family XMC Module 2.10 (4/11/2016)
800.71671 Addendum Model 71671 4-Ch D/A, with Interp Filters, Cobalt Family XMC Module 1.2 (2/12/2016)
801.71670 Programmer's Reference ReadyFlow Board Support Libraries for Models 71670 and 71671 2.2 (11/19/2015)
809.7x670 Supplemental Manual Vendor Data Sheets for Model 7x670 Series Operating Manuals 1.0 (3/1/2012)
815.71670 User's Guide Model 4995A Option 167/671 Windows ReadyFlow BSP for Models 71670, 71671 4.1A (10/16/2017)
816.71670 User's Guide Model 4994A Option 167/671 Linux ReadyFlow BSP for Models 71670 & 71671 4.0 (5/31/2019)



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