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Model 72650 2-Channel 500 MHz A/D and 2-Channel 800 MHz D/A w/ Virtex-6 FPGA - 6U cPCI

This product is in the Inactive Life Cycle. Please contact Pentek for additional information.

Block Diagram

Datasheet

Manuals

Literature

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  • Complete radar and software radio interface solution
  • Supports Xilinx Virtex-6 LXT and SXT FPGAs
  • Two 500 MHz 12-bit A/Ds
  • One DUCs (digital upconverters)
  • Two 800 MHz 16-bit D/As
  • Up to 2 GB of DDR3 SDRAM; or: 32 MB of QDRII+ SRAM
  • Sample clock synchronization to an external system reference
  • LVPECL clock/sync bus for multiboard synchronization
  • Optional LVDS connections to the Virtex-6 FPGA for custom I/O

 

Model 72650

Cobalt Xilinx Virtex-6
 

Model 72650 Block Diagram

Please refer to the product datasheet for a larger version of the block diagram


Hardware and Software Manuals - ( top )

Please note that some hardware and software manuals are used for more than one Pentek product. Although the model numbers given in the description of each manual below may vary, these manuals are all used for the product described on this web page.

Part No.
Type
Description
Revision/Date
800.71601 Addendum Model 716xx Battery Installation 1.1 (12/24/2013)
800.71603 Addendum Model 716xx Reprogram FPGA from FLASH 1.0 (1/23/2012)
800.71650 Operating Manual Model 71650 2-Ch 500 MHz A/D and 2-ch 800-MHz D/A Cobalt Family XMC Module 1.11 (6/25/2015)
801.71650 Programmer's Reference ReadyFlow Board Support Libraries for Models 71650 and 71651 2.2 (10/28/2015)
809.7x650 Supplemental Manual Vendor Data Sheets for Model 7x650 Series Operating Manuals 1.0 (1/20/2012)
815.71650 User's Guide Model 4995A Option 165/651/751 Windows ReadyFlow BSP for 7165x, 71751 4.1A (10/10/2017)
816.71650 User's Guide Model 4994A Option 165/651/751 Linux ReadyFlow BSP for 71650, 71651, 71751 4.1 (10/28/2015)



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